Tag Archives | multicore


The latest MIPS-based communications and networking processors


A few days ago somebody asked me on Twitter for a list of MIPS-based networking processors. A few hours later I went to work and produced a list of the most recent chips that use MIPS CPUs. The list below focuses on two main categories: 32-bit home networking and 64-bit enterprise communications, storage and security. […]

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MIPS I6400 - Android robot

MIPS I6400, the leading 64-bit CPU revealed: coverage roundup


Summary: Two weeks ago we announced the brand new 64-bit MIPS I6400 CPU. Here’s what you need to know, as well as a roundup of media coverage. On September 2nd, Imagination revealed to the world the latest member of the Warrior family: the 64-bit MIPS I6400 CPU IP core. In case you missed any of […]

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MIPS I6400 - CPU-block_diagram_f

Meet MIPS I6400, the CPU of choice for the 64-bit computing revolution


When we first introduced the breakthrough MIPS Warrior family, we promised to deliver a disruptive and comprehensive roadmap of 32 and 64-bit CPUs that incorporate new, innovative architectural features and provide best-in-class performance and efficiency for a wide range of applications. The first CPU we launched was MIPS P5600, a high-end 32-bit processor targeting ultimate […]

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MIPS microAptiv_UP_block_diagram

Extending the award-winning MIPS Aptiv generation of CPU cores


Paul Evans, senior business development manager for Imagination, recently gave an exciting keynote at the Imagination Summit in Asia titled ‘MIPS CPU Processor Solutions: A Roadmap to High Performance and Low Power’. During this exciting and well-attended presentation, he talked about the latest developments within our MIPS Aptiv generation of CPU IP and introduced MIPS […]

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Cavium OCTEON III MIPS64-based family block diagram

Cavium introduces the MIPS64-based OCTEON III CPU family for ultra-high performance networking


Cavium has been a leading provider of highly integrated semiconductor products for networking, communications and cloud infrastructure for years, but things are about to get even more interesting thanks to the recent launch of OCTEON III, a new family of processors that is poised to make an impact in the enterprise systems market. Its brand […]

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Dedicated Shader vs Unified Architecture Modules-1024x569

Understanding PowerVR Series5XT: Multithreading, multitasking ALUs, the MicroKernel and core scalability


A unified architecture means that the ALUs (Arithmetic Logic Units – the bits of the hardware that do all the number crunching as part of shader or compute program processing) are generic and not dedicated to specific processing tasks. This type of ‘universal (or unified) shading’ approach is unanimously recognised as the most efficient. Unified […]

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mips interAptiv architecture

Lantiq’s new high-performance XWAY VRX300 chipset with multi-threaded MIPS CPUs targets VDSL2 applications


Earlier this month, Lantiq introduced the new XWAY™ VRX300™ chipset that incorporates a multi-threaded MIPS CPU. The XWAY VRX300 joins the existing MIPS-based members of Lantiq’s AnyWAN™ system architecture to offer an integrated, high performance VDSL chipset family delivering data rates of up to 200 Mbps for gateway designs. The XWAY VRX300, an ultra-fast VDSL2 […]

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mips android set top box-2

The world’s first Android 4.0 set top box certified with Google Mobile Services – it’s MIPS!


At the recent 2013 International CES, Broadcom and Samsung announced the world’s first Android 4.0 set top box with Google Mobile Services (GMS). This first-of-its-kind device is based on—you guessed it, MIPS! While dozens of Android set-top boxes already exist in the market, Samsung’s SMT-E5015 Smart TV box is the first to pass the stringent […]

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Imagination’s MIPS architecture is coming to the universities in Russia and Ukraine


Imagination Technologies is working with our partner and licensee Microchip Technology, a leading microcontroller company, to further promote the use of the MIPS® architecture to universities in Russia and Ukraine. Microchip’s PIC32 microcontroller uses the MIPS32® M4K™ core, and development boards based on the PIC32 are ideal vehicles through which students can learn about microcontroller-based […]

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The continuing evolution of the MIPS Instruction Set Architecture


Originally created in the early 1980s, the MIPS instruction set architecture is one of the earliest RISC architectures, and is one of the few CPU architectures in wide usage today. To maintain that heritage of usability and appropriateness for modern market segments, the architecture has continued to evolve over time. In the time since I […]

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