20-Parallel versus serial execution of a statement in a warp

Measuring GPU compute performance

    

After exploring a quick guide to writing OpenCL kernels for PowerVR Rogue GPUs and analyzing a heterogeneous compute case study focused on image convolution filtering, I am going to spend some time looking at how developers can measure the performance of their OpenCL kernels on PowerVR Rogue GPUs. The performance of scalar code running on […]

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Vulkan API_explicit control

Vulkan: Explicit operation and consistent frame times

    

Welcome to the penultimate post in my series of blog posts on Vulkan, thanks for following so far – one more to go after this one! In this post I’ll be doing some analysis of why and how Vulkan is an explicit API, and what exactly that means. There is a lot of mention of Vulkan being a low-level API, […]

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Standing Egg - MIPS FPGA

Standing Egg demonstrates virtual gyroscope on MIPS-based MCU

    

I’ve recently returned from a trip to China where I’ve attended the two Imagination Summits organized in Beijing and Shanghai, respectively. Alongside a series of exciting presentations from my colleagues as well many of our ecosystem partners, I also enjoyed seeing several demonstrations and prototypes of next-generation devices using Imagination IP in addition to many […]

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Ensigma Series5 RPU - Ensigma Explorer Wi-Fi Bluetooth LoWPAN FM radio

Ensigma Series5 radio processors for high performance connectivity

    

Since their release, the Ensigma Series4 family of Radio Processing Units (RPUs) has been the powerhouse for high-performance connectivity standards such as 802.11ac 2×2 and 802.11n 4×4 as well as many TV and radio broadcast standards supported by Imagination. Multiple customers have licensed these RPUs to integrate more (or all) high-performance connectivity on-chip; examples include […]

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05-Zero-copy transfer between a camera and display

Supported zero-copy flows inside the PowerVR Imaging Framework

     

In a previous article we described our PowerVR Imaging Framework, a set of extensions to the OpenCL and EGL APIs that enable efficient zero-copy sharing of memory between a PowerVR GPU and other system components such as a CPU, ISP and VDE. Most flows use EGL to facilitate the sharing of objects between multiple client […]

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Vulkan multi-threading

Vulkan: Scaling to multiple threads

   

We’re halfway through our series of blog posts on Vulkan – hopefully you’ve checked out the other blog posts, or tuned into the webinars, and are following so far! This post I’ll be discussing the importance of scaling to multiple threads, and how Vulkan helps achieve that. CPU bottlenecks – redux Modern CPUs have multiple cores, for a variety of great […]

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03 - Creator Ci40 dev board - full specs

Creator Ci40 dev kit puts the IoT in a box for £80

        

Recent research from Gartner suggests that by 2020 the Internet of Things market will grow to include billions of connected devices from smart sensors and gateways to data centers and other computing platforms. To accelerate IoT development, Imagination is today introducing Creator Ci40, the most complete development kit for the Internet of Things. The package […]

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HSA Foundation(3)

2015 Linley Processor Conference: Heterogeneous computing, IoT security and the future of the automotive industry

       

I was recently at the 2015 Linley Processor Conference in San Jose and wanted to share with you some of my observations and takeaways. Imagination had a strong presence at the show with Jim Nicholas, VP of MIPS Business Operations, delivering a talk titled Heterogeneous Systems Architecture: Coming Soon to a Platform Near You. Jim’s […]

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GameBench - PowerVR (1)

GameBench offers a new way to test game performance, with a little help from PVRScope

   

Formerly of Engadget, Forbes and BBC, Sharif Sakr is presently a consultant for XPRIZE and business development director at GameBench. You can follow him on Twitter @shotsheriff. This blog post was inspired by a short but interesting chat with a game developer I met at GameBench’s recent open( London ) event. This developer was in […]

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PEZY Computing

PEZY licenses MIPS for “green” supercomputing

    

In a press release issued today PEZY Computing announced it is working on a MIPS64-based PEZY-SC2 family of many-core chips for supercomputers and HPC applications that will scale up to 4096 processing nodes. The 64-bit MIPS CPUs will act as the host processors for the system, making PEZY-SC2 the first generation of 64-bit HPC processors […]

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